The U.S. International Trade Commission (USITC) has voted to institute an investigation of certain silicon-on-insulator wafers.  The products at issue in the investigation are layered silicon and insulator wafers used in the manufacture of semiconductors such as radio frequency chips.

The investigation is based on a complaint filed by Silicon Genesis Corporation of Santa Clara, CA, on May 26, 2016. Letters supplementing the complaint were filed on October 3, 7, and 12, 2016.  The complaint alleges violations of section 337 of the Tariff Act of 1930 in the importation into the United States and sale of certain silicon-on-insulator wafers that infringe patents asserted by the complainant.  The complainant requests that the USITC issue a limited exclusion order and cease and desist orders.

The USITC has identified Soitec, S.A., of Bernin, France, as the respondent in investigation.

By instituting this investigation (337-TA-1025), the USITC has not yet made any decision on the merits of the case.  The USITC’s Chief Administrative Law Judge will assign the case to one of the USITC’s administrative law judges (ALJ), who will schedule and hold an evidentiary hearing.  The ALJ will make an initial determination as to whether there is a violation of section 337; that initial determination is subject to review by the Commission.

The USITC will make a final determination in the investigation at the earliest practicable time.  Within 45 days after institution of the investigation, the USITC will set a target date for completing the investigation.  USITC remedial orders in section 337 cases are effective when issued and become final 60 days after issuance unless disapproved for policy reasons by the U.S. Trade Representative within that 60-day period.